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SE-17072
SYSTEM EVALUATION BOARD
TARGET DEVICES: PD17071 PD17072 PD17073
(c)
1995
Document No. U11406EJ2V0UM00 (Previous No. EEU-1525) Date Published July 1996 P Printed in Japan
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J96. 3
Major Revised in This Version
Page Throughout Contents * PD17071 has been added as an evaluation target * EP-17K64GB and EV-9500GB-64 have been added as development tools * The pin name of actual chip have been changed as follows: VDD1 VDD VDD2 REG0, VDD5 REG1 VDD3 REGLCD0, VDD4 REGLCD1 CAP0 CAPLCD0, CAP1 CAPLCD1 p.3 A note has been added to the item Instruction cycle in CHAPTER 2 SPECIFICATIONS p.3 The value when the actual chip is the PD17071GB has been added to the item Power supply in CHAPTER 2 SPECIFICATIONS p.31 A note has been added to Table 4-5. Monitor Pins and LEDs, and Their Functions p.33 A figure in Table 4-6. Setting of Jumper Switches and Slide Switches (1/2) has been changed. p.35 p.37, 38 (1) PD17071 has been added to CHAPTER 5 Table 5-3. Connector Pins of JP1 and Table 5-4. Connector Pins of JP2 has been changed The mark shows major revised points.
CONTENTS
CHAPTER 1 GENERAL ................................................................................................................... CHAPTER 2 SPECIFICATIONS ...................................................................................................... CHAPTER 3 BLOCK DIAGRAM .................................................................................................... CHAPTER 4 HOW TO USE .......................................................................................................... 4.1 4.2 4.3 4.4 4.5 4.6 4.7 4.8 Using Level Conversion Chip (PD6706GF) ................................................................. Supplying Voltage to SE Board ...................................................................................... Setting of Other Switches ................................................................................................ When SE Board Is Mounted to In-Circuit Emulator ..................................................... Using SE Board Alone ..................................................................................................... Monitor Pins and LEDs .................................................................................................... Fine-Tuning of Source Clock Oscillation Frequency (150 kHz) ................................. Setting of Jumper Switches and Slide Switches .........................................................
1 3 5 7 7 7 13 22 27 30 31 32 35 39 41 42 44 45
CHAPTER 5 CONNECTOR PIN LIST .......................................................................................... CHAPTER 6 CONNECTING SE-17072 AND TARGET SYSTEM ............................................ 6.1 6.2 6.3 6.4 Connecting SE-17072 and Emulation Probe ................................................................. Connecting Emulation Probe and Target System ........................................................ Turning ON/OFF Power .................................................................................................... Removing Emulation Probe from Target System ........................................................
CHAPTER 7 DIMENSIONS OF PROBE, CONVERSION SOCKET, AND SOCKET CONVERSION ADAPTER ............................................................ 7.1 Dimensions of Probe ........................................................................................................ 7.2 Dimensions of Conversion Socket and Socket Conversion Adapter .......................
7.2.1 7.2.2 EV-9500GB-56 ........................................................................................................................ EV-9500GB-64 ........................................................................................................................
47 47 49
49 51
7.3 Recommended Mounting Pattern of Conversion Socket on Printed Circuit Board .......................................................................................................
53
-i-
LIST OF FIGURES
Figure No. 2-1 3-1 4-1 4-2 4-3 4-4 4-5 4-6 4-7 4-8 4-9 4-10 4-11 4-12 4-13 4-14 4-15 4-16 4-17 4-18 4-19 4-20 4-21 4-22 4-23 4-24 4-25 4-26 6-1 6-2 6-3 6-4 6-5 6-6
Title SE-17072 Component Layout ............................................................................................................ SE-17072 Block Diagram ................................................................................................................... When SE Board Is Mounted to In-Circuit Emulator and VDD1 = +3 V, VCC = +5 V ......................... When SE Board Is Mounted to In-Circuit Emulator, and VDD1 Is Supplied from CN12 Pin ............ When SE Board Is Mounted to In-Circuit Emulator and VDD1 Is Supplied from Emulation Probe .................................................................................................................................. When SE Board Alone Is Used, and VDD1 = +3 V and VCC = +5 V ................................................. When SE Board Alone Is used, and VDD1 Is Supplied from CN12 Pin ............................................ When SE Board Alone Is Used, and VDD1 Is Supplied from Emulation Probe ................................ Setting of SW2 .................................................................................................................................... Setting of SW3 .................................................................................................................................... Setting of JS3 ...................................................................................................................................... Peripheral Circuit of JP6 ..................................................................................................................... Setting of JP6 ...................................................................................................................................... Peripheral Circuit of JP7 ..................................................................................................................... Setting of JP7 ...................................................................................................................................... Peripheral Circuit of JP8 ..................................................................................................................... Setting of JP8 ...................................................................................................................................... Peripheral Circuit of JP9 ..................................................................................................................... Setting of JP9 ...................................................................................................................................... Peripheral Circuit of JP10-JP12 ......................................................................................................... Setting of JP10-JP12 .......................................................................................................................... Appearance of IE-17K (with exterior lid removed) ............................................................................ Mounting and Removing SE-17072 ................................................................................................... Setting of ROM/RAM Selector Slide Switch ...................................................................................... PROM (U9) Mounting Socket ............................................................................................................. Example of Connection When SE-17072 Alone Is Used .................................................................. Layout of Monitor Pins and LEDs ...................................................................................................... Fine-Tuning of Source Clock .............................................................................................................. Connecting SE-17072 and Target System ........................................................................................ Connecting SE-17072 and Emulation Probe ..................................................................................... Connecting Socket Conversion Adapter and Conversion Socket .................................................... Securing Socket Conversion Adapter and Conversion Socket with Screw ..................................... Connecting Socket Conversion Adapter and Emulation Probe ........................................................ Removing Emulation Probe ................................................................................................................
Page 4 5 10 10 11 11 12 12 13 14 15 16 16 17 17 18 18 19 19 20 21 22 23 27 28 29 30 31 40 41 42 43 43 45
- ii -
LIST OF TABLES
Tabe No. 1-1 4-1 4-2 4-3 4-4 4-5 4-6 5-1 5-2 5-3 5-4
Title Development Tools for SE-17072 ...................................................................................................... Function of JS1 When SE Board Is Mounted to In-Circuit Emulator ............................................... Function of JS1 When SE Board Alone Is Used ............................................................................... Power Supply Pins and Their Function ............................................................................................. Device Number and SE Board Number ............................................................................................. Monitor Pins and LEDs, and Their Function ..................................................................................... Setting of Jumper Switches and Slide Switches ............................................................................... Connector Pins of J1 .......................................................................................................................... Connector Pins of J2 .......................................................................................................................... Connector Pins of J1 .......................................................................................................................... Connector Pins of J2 ..........................................................................................................................
Page 2 8 8 9 25 30 32 35 36 37 38
- iii -
[MEMO]
CHAPTER 1 GENERAL
The SE-17072 is a system evaluation board (SE board) for 4-bit single-chip microcontrollers PD17071, 17072 and 17073. This SE board is used for debugging mounted to a 17K series in-circuit emulator (IE-17K or 17K-ET). It can also be used in stand alone mode for system evaluation. To interface with the target systemNote 1, actual chips PD17071GB-00x, PD17072GB-00x or PD17073GB-00x (hereafter referred to as the "actual chip"Note 2) is used; therefore, the functions of the SE-17072 are equivalent to the device to be evaluated. To connect the SE-17072 and the target system, an optional emulation probe (EP-17K56GBNote 3) (separately available) or EP-17K64GBNote
4
(separately available) and a set of a conversion socket and socket conversion
adapters, EV-9500GB-56 or EV-9500GB-64, supplied as an accessory are necessary. Because the SE-17072 is equipped with a level conversion chip, evaluation can be also performed even when the supply voltage of the PD17071, 17072 or 17073 is not +3 VNote 5. Notes 1. A system developed by the user and is subject to evaluation. 2. The actual chips are mounted in the sockets on the SE board for use. At the time of shipping, two
PD17072GB-00x chips are supplied mounted on the board. Please substitute two suitable chips
(master and slave) to match the evaluation object device (PD17071, 17072, 17073). (Refer to Figure 2-1) 3. This emulation probe can be used for 56-pin plastic QFP (10 x 10 mm, 0.65-mm pitch). Following two types are available. For package with bent leads : EP-17K56GB-1 For package with inverted leads : EP-17K56GB-2 4. This emulation probe can be used for 64-pin plastic TQFP (10 x 10 mm, 0.65-mm pitch) For package with bent leads 5. The supply voltages of the PD17071, 17072, and 17073 are as follows:
PD17071
: +1.85 V to +3.6 V
PD17072, 17073 : +1.8 V to +3.6 V
1
CHAPTER 1
GENERAL
Table 1-1. Development Tools for SE-17072
SE Board Usage Assembler Output File (host machine) ICE fileNote 1 PC-9800 series IBM PC/ATTM PRO fileNote 2 PC-9800 series IBM PC/AT In-Circuit Emulator Support SoftwareNote 3 Emulation Probe Product to Be Evaluated
SE-17072
When used with in-circuit emulator When SE-17072 alone is used
IE-17K IE-17K-ET
SIMPLEHOST(R)
Unnecessary
Unnecessary
EP-17K56GB + EV-9500GB-56 or EP-17K64GB + EV-9500GB-64
PD17071 or PD17072
or PD17073
Notes 1. ICE file : Automatically output after the source file has been assembled. 2. PRO file : Output if an assembler option (/PRO) is specified when the source file is assembled. For details on the ICE file and PRO file, refer to the User's Manual of the AS17K or RA17K. 3. SIMPLEHOST is software that serves as a man-machine interface when the in-circuit emulator is used. This software runs on WindowsTM and allows you to debug, by using a mouse, the source lists, figures, and tables displayed on the CRT. For details, refer to the User's Manual of the SIMPLEHOST. Although commercially available RS-232-C communication software other than SIMPLEHOST can also be used for interfacing, knowledge on baud rate setting and in-circuit emulator's commands is required. For details, refer to the User's Manual of the IE-17K or IE-17K-ET.
2
CHAPTER 2 SPECIFICATIONS
Here are the specifications of the SE-17072: Product name Program memory : SE-17072 : * The PD43256AGU mounted on board is used when the SE-17072 is used with an in-circuit emulator (IE-17K or IE-17K-ET). * When the SE-17072 alone is used, write program to the PD27C512D or PD27C1001AD and mount the memory onto a socket (U9) on the board. Data memory Operating frequency Instruction cycle Storage temperature Power supply : The on-chip memory of the actual chips is used. : 75 kHz : 53.3 s (at 75 kHz and in normal mode), 106.6 sNote (at 75 kHz in low-speed mode) : -10 to +50C (without condensation) : * For actual chips (VDD1): +1.85 to +3.6 V (when the actual chips are the PD17071GB) +1.8 V to +3.6 V (when the actual chips are the PD17072GB or 17073GB) Power is supplied from emulation probe or CN12 pin. * For SE-17072 (VCC) : +5 V 5% Power is supplied from the in-circuit emulator when the SE-17072 is used with an incircuit emulator. When the SE-17072 alone is used, supply power from the CN11 pin. Current consumption Dimensions Note : 110 mA (MAX.) (without load and with the PD27C1001AD used as the program memory) : 150 x 175 x 33 mm
Operating temperature : +10 to +40C
Note provided for the PD17071GB.
3
CHAPTER 2
SPECIFICATION
Figure 2-1. SE-17072 Component Layout
CH57 55 53 51 30 8 6 4 CH2 56 GND 54 52 50 29 7 5 3 CH1
SW1
CH11 13161915 9 213234363840 4345474928262422 JP10
U13 CH10 1214182017313335373941 U14 4244464858272523
WT 1
ctual chip (slave) PD17071GB/ PD17072GB/ PD17073GB JS3
U15
SW3
PD67076GF
CH60 CH59
CN9 ctual chip (master) PD17071GB/ PD17072GB/ PD17073GB
LED1
CN11
U1
JP7 WT WT 3 4
JP8 Mam' chip (gate array)
CN7
WT2 JP12 JP9
LED2
VCOL JP11 VCOH AMIF
FMIF
JP3
JP4 J2
U9
JP8
PD27C1001A PD4325AGU
CN8 CN12 JS2 SW2
U5
JS1
J1
4
CHAPTER 3 BLOCK DIAGRAM
Figure 3-1. SE-17072 Block Diagram
Connector connecting emulator probe J1 CE VDD J2 CN12 12
P1A, P1C, P0B, INT, BEEP, LCD, COM, CAP, etc. Actual chip (master) PD17071GB/ XO PD17072GB/ PD17073GB XI AI bus D bus J
P0A, P0C, P1B Actual chip (slave) PD17071GB/ PD17072GB/ PD17073GB CE
XO XI
CE
CKOUT
VDD1 JS1 Synchronization processing signal
Level conversion chip
Clock select circuit VDD Reset switch RES0 Mam' chip (gate array)
L User clock Program memory
1/2 divider Fixed to 75 kHz
Supervisor bus
Trace bus Coverage bus 12 CN11
CN7
CN8
CN9
Connector connecting memory board of in-circuit emulator
VCC
LED H Supervisor clock
Source clock 150 kHz
VDD1
Overcurrent protection
5
[MEMO]
6
CHAPTER 4 HOW TO USE
4.1 Using Level Conversion Chip (PD6706GF)
(1) Outline of level conversion chip The level conversion chip is an IC that converts a voltage level of the target system (or SE board) into the voltage at which the SE board (or target system) operates if the operating voltages of the target system and SE board are different from each other (VDD1 VCC, VCC = +5 V). Therefore, this IC allows smooth signal transfer between the target system and SE board even when the operating voltages of the two are different. (2) Using level conversion chip The level conversion chip automatically operates when a voltage other than 5 V is applied between the VDD1 and GND pins of the emulation probe or to the CN12 pin of the SE board with the jumper switch JS1, which selects a method of supplying power to the SE board, set to the VDD1 side. Remarks 1. VDD1 is the supply voltage of the target system to be used. Power can be supplied from the target system to the actual chips on the SE board from the CN12 pin or emulation probe. Consequently, debugging can be performed in an environment close to the actual environment. 2. VCC is the voltage at which the SE board (except the actual chips) operates. Always supply +5 V as VCC. When the SE board is mounted to an in-circuit emulator, VCC is automatically supplied from the in-circuit emulator. When the SE board alone is used, supply VCC from the CN11 pin.
4.2 Supplying Voltage to SE Board
Two types of voltages must be supplied to the SE board: VCC and VDD1. VCC is the voltage at which the SE board (except the actual chips) operates. The actual chip operates at VDD1. Always supply +5 V as VCC. As VDD1, supply a voltage in the range of the operating voltage of the actual chips (+1.85 to +3.6 V: PD17071, +1.8 to +3.6 V: PD17072, 17073). (1) Jumper switch selecting method of power supply to SE board (JS1) Jumper switch JS1 selects whether the voltage supplied to the SE board (VCC = +5 V) converted to +3 V, or the voltage supplied from the emulation probe or CN12 pin (VDD1) is supplied to the actual chips. Table 4-1 shows the function of JS1 when the SE board is mounted to an in-circuit emulator. Table 4-2 shows the function of JS1 when the SE board alone is used. If the supply voltage of the target system is +3 V, set JS1 to the +3 V side. When the SE board is mounted to an in-circuit emulator, + 5 V supplied from the in-circuit emulator is automatically converted to +3 V and supplied. When the SE board alone is used, +5 V supplied from the CN11 pin is converted into +3 V. This brings a merit that supplying voltage is extremely easy. If the supply voltage of the target system is other than +3 V, and if JS1 is set to the VDD1 side, the voltage of the target system can be supplied to the actual chip from the emulation probe or CN12 pin, so that evaluation can be performed in an environment close the actual environment.
7
CHAPTER 4
HOW TO USE
Table 4-1. Function of JS1 When SE Board Is Mounted to In-Circuit Emulator
Type of Power Setting of JS1 Power Supplied to Actual Chips (VDD1) +5 V supplied from in-circuit emulator is converted to +3 V. Power to Operate SE Board (Except Actual Chips) (VCC) +5 V is supplied from in-circuit emulator.
+3V
JS1
VDD1 +3V
JS1 Power must be supplied from emulation probe or CN12 pin.
VDD1
Table 4-2. Function of JS1 When SE Board Alone Is Used
Type of Power Setting of JS1 Power Supplied to Actual Chips (VDD1) +5 V supplied from CN11 pin is converted to +3 V. Power to Operate SE Board (Except Actual Chips) (VCC) +5 V must be supplied from CN11 pin.
+3V
JS1
VDD1 +3V
JS1
Power must be supplied from emulation probe or CN12 pin.
VDD1
The shaded portions in the above figures indicate the selected switch positions.
8
CHAPTER 4
HOW TO USE
(2) Power supply pins The SE board has three pins through which power is supplied from external sources. Appropriate pin and power must be selected and used depending on the evaluation environment. Table 4-3 shows the functions of these pins. Table 4-3. Power Supply Pins and Their Function
Pin Name Type of Power (Range of Supplied Voltage) VCC (+5 V 5%) Function
CN11
This pin is used to supply power when SE board alone is used (except actual chips). Always supply +5 V to this pin. Do not supply power through this pin when SE board is mounted to in-circuit emulator. This pin supplies operating voltage to actual chips when voltage of target system is VCC +3 V (JS1 is set to VDD1 side).
CN12
VDD1 +1.85 to 3.6 V: PD17071GB +1.8 to 3.6 V: PD17072GB, 17073GB VDD1 +1.85 to 3.6 V: PD17071GB +1.8 to 3.6 V: PD17072GB 17073GB
Emulation probe (VDD1 and GND pins)
Function equivalent to that of CN12 pin. CN12 pin of SE board is connected to power supply pin of emulation probe.
Remark Pin 1 of the CN11 pin is GND, and pin 2 is the power supply pin. To supply power, use the power supply cable supplied as an accessory.
9
CHAPTER 4
HOW TO USE
(3) Example of actual use <1> When SE board is mounted to in-circuit emulator (a) When SE board is mounted to in-circuit emulator, and VDD1 = +3 V and VCC = +5 V Set JS1 to the +3-V side. VCC and VDD1 are supplied from the in-circuit emulator. Figure 4-1. When SE Board Is Mounted to In-Circuit Emulator and VDD1 = +3 V, VCC = +5 V
Target system SE board Power supply (VDD)
CN11
VDD1
+3 V
CN12
Emulation probe
VDD1
VCC
Supplied from in-circuit emulator
(b) When SE board is mounted to in-circuit emulator, and VDD1 +3 V and VCC = +5 V Set JS1 to the VDD1 side. VCC is supplied from the in-circuit emulator. VDD1 is supplied from the CN12 pin or emulation probe. Figure 4-2. When SE Board Is Mounted to In-Circuit Emulator, and VDD1 Is Supplied from CN12 Pin
+3 V JS1
JS1
+5 V
Target system SE board Power supply (VDD) CN11
VDD1 CN12 +3 V
JS1
+3 V
JS1
VDD1
Emulation probe
VCC
+5 V
Supplied from in-circuit emulator
10
CHAPTER 4
HOW TO USE
Figure 4-3. When SE Board Is Mounted to In-Circuit Emulator and VDD1 Is Supplied from Emulation Probe
Target system SE board Power supply (VDD) CN11
VDD1
+3 V
VDD1 Emulation probe
VCC
+5 V
Supplied from in-circuit emulator
<2> When SE board alone is used (a) When SE board alone is used, and VDD1 = +3 V and VCC = +5 V Set JS1 to +3-V side. VCC and VDD1 are supplied from the CN11 pin. Figure 4-4. When SE Board Alone Is Used, and VDD1 = +3 V and VCC = +5 V
CN12
+3 V JS1
JS1
VCC
Target system SE board Power supply (VDD)
CN11
VDD1 CN12 +3 V
JS1
+3 V
JS1
VDD1
Emulation probe
11
CHAPTER 4
HOW TO USE
(b) When SE board alone is used, and VDD1 +3 V and VDD = +5 V Set JS1 to the VDD1 side. VCC is supplied from the CN11 pin and VDD1 from the CN12 pin or emulation probe. Figure 4-5. When SE Board Alone Is used, and VDD1 Is Supplied from CN12 Pin
VCC
Target system SE board Power supply (VDD)
CN11
VDD1
+3 V
CN12
Emulation probe
VDD1
Figure 4-6. When SE Board Alone Is Used, and VDD1 Is Supplied from Emulation Probe
+3 V JS1
VCC
JS1
Target system SE board Power supply (VDD)
CN11
VDD1
+3 V
VDD1 Emulation probe
12
CN12
+3 V JS1
JS1
CHAPTER 4
HOW TO USE
4.3 Setting of Other Switches
(1) SW1: Reset switch SW1 is the reset switch used when the SE board alone is used. For details, refer to 4.5 Using SE Board Alone. (2) SW2: ROM/RAM selector slide switch This switch selects the setting of the program memory to be used. Figure 4-7. Setting of SW2 <1> When SE board is mounted to in-circuit emulator
ROM
RAM
SW2
<2> When SE board alone is used
ROM
RAM
SW2
This shaded portions in the above figure indicate the selected switch positions.
13
CHAPTER 4
HOW TO USE
(3) SW3: CE pin pull-up select switch This switch specifies whether the CE pin of the actual chips is pulled up or not. When the SE-17072 is not connected to the target system, be sure to pull up the CE pin by setting this switch to the ON side. Figure 4-8. Setting of SW3 <1> Pull up CE pin
SW3
ON
OFF
<2> Not pull-up CE pin
SW3
ON
OFF
Remark The shaded portions in the above figures indicate the selected switch positions.
14
CHAPTER 4
HOW TO USE
(4) JS3: Jumper switch for CE chattering prevention When a low-level voltage of 200 s or less is input to the CE pin due to influence of chattering, the SE board malfunctions or hangs up. Therefore, set this switch to the CHAT side when a circuit that may generate chattering is used in the target system. Figure 4-9. Setting of JS3 <1> If there is a possibility that chattering occurs in target system
6
5
4
3
2 CHAT
1
<2> If there is no possibility that chattering occurs in target system
6
5
4
3
2 CHAT
1
Remark The shaded portions in the above figures indicate the selected switch positions.
15
CHAPTER 4
HOW TO USE
(5) JP6: Jumper switch selecting I/O modes of P0D2/AMIFC and P0D3/FMIFC/AMIFC pins This switch selects whether signals are input/output to/from the P0D2/AMIFC and P0D3/FMIFC/AMIFC pins of the actual chips through a probe or a coaxial cable. The P0D2/AMIFC and P0D3/FMIFC/AMIFC pins are I/O ports that can also implement an IF counter function. Figure 4-10. Peripheral Circuit of JP6
WT44 (0.022 F)
Coaxial connector (FMIF)
R366 (50 ) P0D3/FMIFC/AMIFC JP6 F COAX A Probe connector (J1-J22) Probe connector (J1-J24)
PD17071 or PD17072 or PD17073 P0D2/AMIFC
WT33 (0.022 F)
Coaxial connector (AMIF)
R355 (50 )
Figure 4-11. Setting of JP6 <1> Through probe
COAX
<2> Through coaxial cable
COAX
F
A
F
A
Remark The shaded portions in the above figures indicate the selected switch positions.
16
CHAPTER 4
HOW TO USE
(6) JP7: Jumper switch selecting input mode of VCOL and VCOH pins This switch selects whether signals are input to the VCOL and VCOH pins of the actual chips through a probe or a coaxial cable. The VCOL and VCOH pins are input pins of PLL local oscillation signals. Figure 4-12. Peripheral Circuit of JP7
WT11 (0.01 F) Coaxial connector (VCOH) R344 (50 ) VCOH JP7
PD17071 or PD17072 or PD17073
VCOL
H COAX L
Probe connector (J1-J32) Probe connector (J1-J30)
WT22 (0.01 F)
Coaxial connector (VCOL) R333 (50 )
Remark If a signal is input to the VCO pin through a probe, the signal may not be correctly input due to the influence by the wiring capacitance of the probe and soon. When evaluating PLL, it is recommended to input signals the VCOL and VCOH pins through a coaxial cable. Figure 4-13. Setting of JP7 <1> Signal input through probe
COAX
<2> Signal input through coaxial cable
COAX
H
L
H
L
Remark The shaded portions in the above figures indicate the selected switch positions.
17
CHAPTER 4
HOW TO USE
(7) JP8: Jumper switch selecting capacitor for PLL This switch selects whether the capacitor on the SE board or the capacitor on the target system is connected to the REG0 pins of the actual chips (for PLL voltage regulator output). Figure 4-14. Peripheral Circuit of JP8
JP8
PD17071 or PD17072 or PD17073
REG0
22
Probe connector (J1-J34) EX IN C25 (0.1 F)
Figure 4-15. Setting of JP8 <1> To connect capacitor on SE board <2> To connect capacitor on target system
JP8
JP8
IN
VDD2
EX
IN
VDD2
EX
Remarks 1. The shaded portions in the above figures indicate the selected switch positions. 2. VDD2 corresponds to REG0 pins of the actual chips.
18
CHAPTER 4
HOW TO USE
(8) JP9: Jumper switch selecting capacitor for oscillation circuit regulator This switch selects whether the capacitor on the SE board or the capacitor on the target system is connected to the REG1 pins of the actual chips (for oscillation circuit voltage regulator output). Figure 4-16. Peripheral Circuit of JP9
JP9
PD17071 or PD17072 or PD17073
Probe connector (J1-J42) REG1 EX IN C26 (0.1 F)
Figure 4-17. Setting of JP9 <1> To connect capacitor on SE board
JP9
<2> To connect capacitor on target system
JP9
IN
VDD5
EX
IN
VDD5
EX
Remarks 1. The shaded portions in the above figures indicate the selected switch positions. 2. VDD5 corresponds to REG1 pins of the actual chips.
19
CHAPTER 4
HOW TO USE
(9) JP10-JP12: Jumper switches selecting capacitors for LCD driving power supply These switches select whether the capacitor on the SE board or the capacitor on the target system is connected to the REGLCD0, REGLCD1, CAPLCD0, and CAPLCD1 pins of the actual chips. The CAPLCD0 and CAPLCD1 pins are to connect capacitors for a doubler to create an LCD drive voltage. Figure 4-18. Peripheral Circuit of JP10-JP12
JP12 Probe connector (J1-J50) REGLCD1 EX IN C29 (0.1 F)
PD17071 or PD17072 or PD17073
Probe connector (J1-J46) CAPLCD1 JP11 Probe connector (J1-J48) CAPLCD0 EX IN C28 (0.01 F) JP10 Probe connector (J1-J44) REGLCD0 EX IN C27 (0.1 F)
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HOW TO USE
Figure 4-19. Setting of JP10-JP12 <1> To connect capacitor on SE board
JP11 JP10, JP12 IN CAP1 CAP2 IN VDD3, EX VDD4 EX
<2> To connect capacitor on target system
JP11 JP10, JP12 IN CAP1 CAP2 IN VDD3, EX VDD4 EX
Remarks 1. The shaded portions in the above figures indicate the selected switch positions. 2. VDD3 corresponds to REGLCD0 pins of the actual chips. VDD4 corresponds to REGLCD1 pins of the actual chips. CAP1 and CAP2 correspond to CAPLCD0 pins and CAPLCD1 pins of the actual chips, respectively.
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HOW TO USE
4.4 When SE Board Is Mounted to In-Circuit Emulator
The in-circuit emulator is connected to a host machine such as the PC-9800 series to debug the target system. For details on the operations of the in-circuit emulator, refer to the User's Manual of the IE-17K or IE-17K-ET. (1) Mounting and removing SE board to/from in-circuit emulator Mount the SE-17072 to the in-circuit emulator as follows: <1> Remove the exterior and interior lids from the in-circuit emulator. <2> When the interior lid has been removed, a memory board is visible. Insert connectors on the bottom of the SE-17072 (CN7, CN8, and CN9) into the three connectors on the memory board. To remove the SE-17072 from the in-circuit emulator, lift the SE-17072 in the vertical direction. Figure 4-20. Appearance of IE-17K (with exterior lid removed)
Exterior lid
Interior lid
IE-17K
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HOW TO USE
Figure 4-21. Mounting and Removing SE-17072
Connector (female) SE board
Connector (male)
Memory board
Spacer
Next, connect the emulation probe to the connectors J1 and J2 on the SE-17072, to connect the target system. Then attach the interior and exterior lids to the in-circuit emulator. (2) Supplying power After the SE-17072 has been mounted to the in-circuit emulator and before attaching the exterior and interior lids of the in-circuit emulator, turn on power to the in-circuit emulator and confirm that LED1 on the SE-17072 lights. If the supply voltage of the target system is not +3 V, the supply voltage of the target system can be supplied to the actual chips on the SE board from the CN12 pin of the SE board or emulation probe. For details, refer to 4.1 Using Level Conversion Chip (PD6706GF) and 4.2 Supply Voltage to SE Board. If LED1 does not light, the possible causes are as follows: * The power cable of the in-circuit emulator is not connected. * An overcurrent flows to the SE-17072 (about 500 mA or higher). * The SE-17072 is not correctly mounted to the in-circuit emulator. If LED1 does not light, turn off power to the in-circuit emulator, and check to see if the SE-17072 is correctly mounted. If LED1 does not light nevertheless, the SE-17072 may be malfunctioning.
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HOW TO USE
(3) Transferring ICE file to in-circuit emulator The in-circuit emulator (IE-17K or IE-17K-ET) is connected to a host machine such as the PC-9800 series and used to debug the software and hardware of the target system. For details, refer to the User's Manual of the IE-17K or IE-17K-ET. When using the SIMPLEHOST, refer to the User's Manual of the SIMPLEHOST. The procedure to confirm that the SE-17072 has been correctly mounted to the in-circuit emulator when commercially available RS-232-C communication software is used is described below. When the SIMPLEHOST is used, and if the SE-17072 has been correctly mounted, the message "LISTING" is displayed on the screen. <1> Turn on power to the in-circuit emulator. If the power has been already supplied, press the reset switch for restart. The prompt (@@@>) will then be displayed. <2> Next, load the ICE file of the program created with the assembler or the ICE file output by using the .SP0 or .SP1 command to the in-circuit emulator by using the .LP0 or .LP1 command. The in-circuit emulator will not operate until this ICE file has been loaded to it. If the SE board is correctly connected to the in-circuit emulator at this time, a prompt (BRK>) will be displayed as shown in the following example. Example When ICE file for the PD17072 is loaded OK D17072 BRK> If the above messages are not displayed, the possible causes are as follows: * The actual chips mounted to the SE-17072 does not correspond to the loaded ICE file. * An SE board other than the SE-17072 is mounted to the in-circuit emulator. * An ICE file other than that for the PD17072 has been loaded. * The SE-17072 is not completely connected to the in-circuit emulator.
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HOW TO USE
If the in-circuit emulator makes no response, take the following measures: <1> The SE board may not be connected correctly to the in-circuit emulator. Correctly connect the SE board. <2> The target system and SE board may not be connected correctly with the emulation probe. Check the connections again. <3> If JS1 is set to the VDD1 side, power may not be supplied to the actual chip from the emulation probe or CN12 pin. Supply power from the emulation probe or CN12 pin to the actual chip, or set JS1 to the +3V side. If JS1 is set to the +3-V side, the in-circuit emulator automatically converts +5 V to +3 V and supplies power to the SE board (refer to 4.2 Supplying Voltage to SE Board). <4> The reset circuit of the target system may not operate correctly. If this happens, the reset status of the SE board is not stable, and the in-circuit emulator cannot return a response. In this case, turn ON SW3 that selects pull up of the CE pin, to start the in-circuit emulator again. <5> Check the set baud rates of the in-circuit emulator and host machine. For the baud rate setting of the in-circuit emulator, refer to the User's Manual of the IE-17K or IE-17K-ET. (4) Error message and remedial action An error message is displayed if the correspondence between the actual chips mounted to the in-circuit emulator and SE board, and the loaded ICE file is wrong. Moreover, an SE board number is registered to the SE-17072 and a device number is registered to the actual chips, so that debugging can be correctly executed. Table 4-4. Device Number and SE Board Number
Evaluation Device Device Number 58 4C 4F SE Board Number 4C 4C 4C
PD17071 PD17072 PD17073
Remarks 1. A device number is the registration number of each actual chip. 2. An SE board number is the registration number of the SE board. 3. A device number and an SE board number are contained in the data in the ICE file to be loaded and are used by the in-circuit emulator to check the development environment when the ICE file is loaded. For example, an ICE file assembled by using the device file for the PD17072 contain device number = 4C and SE board number = 4C.
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CHAPTER 4
HOW TO USE
Error messages that may be displayed and remedial action to be taken if an error message is displayed are described next. (a) Error message to be displayed and remedial action when actual chip mounted to SE-17072 does not correspond to loaded ICE file. [Error message] ?IDI INVALID DEVICE ID NUMBER [XX-**] Remark XX indicates the device number of the actual chips actually mounted, and ** indicates the device number contained in the loaded ICE file. If this message has been output, check to see if the correct actual chips are mounted on the SE board. If the actual chips are wrong, turn off power to the in-circuit emulator, replace the actual chip, and load the ICE file again. If a wrong device file was selected at assembly time, assemble the source file again by using the correct device file, and load the ICE file again. (b) Error message to be displayed and remedial action when SE board other than SE-17072 is mounted [Error message] ?ISE INVALID SE BOARD NUMBER [##-VV] Remark ## indicates the SE board number of the SE board actually mounted, and VV indicates the SE board number contained in the loaded ICE file. (5) Cautions <1> Turn on power to the in-circuit emulator and then to the target system. <2> Do not use the reset switch on the SE board. To reset the in-circuit emulator, use the reset switch of the in-circuit emulator.
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CHAPTER 4
HOW TO USE
4.5 Using SE Board Alone
(1) Setting of ROM/RAM selector slide switch Set the ROM/RAM selector slide switch (SW2) to the ROM side as shown in Figure 4-22. Figure 4-22. Setting of ROM/RAM Selector Slide Switch
ROM SW2
RAM
The shaded portion in the above figure indicates the selected switch position. (2) Mounting PROM To use the SE-17072 alone, mount a PROM (PD27C512D or PD27C1001AD) as a program memory. Use the PROM that satisfies the following conditions: * ROM size 512 Kbits : PD27C512D-12, -15, -20, or equivalent 1 Mbits : PD27C1001AD-12, -15, -20, or equivalent
The following output files must be written to the PROM as a program: * When the actual chips are the PD17071: PROM file (.PRO) for the PD17071 output by the 17K series assembler * When the actual chips are the PD17072: PROM file (.PRO) for the PD17072 output by the 17K series assembler * When the actual chips are the PD17073: PROM file (.PRO) for the PD17073 output by the 17K series assembler Cautions 1. Do not write the ICE file (.ICE) that the assembler outputs to the in-circuit emulator. When the SE-17072 alone is used, the SE board does not operate with the ICE file. 2. The last address of the program memory of the PD17071, 17072 and PD17073 is as follows:
PD17071 : 0BFFH PD17072 : 0BFFH PD17073 : 0FFFH
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HOW TO USE
Mount the PROM to a socket (U9) on the SE board. Note that the mounting position differs depending on the number of pins of the PROM. Notes on mounting PROM * Mount the PD27C512D (28-pin) so that pin 1 aligns with the number 512 with the up-side-down triangle below it. * Mount the PD27C1001AD (32-pin) so that pin 1 aligns with the number 1 M with the up-side-down triangle below it. Figure 4-23. PROM (U9) Mounting Socket
512 1M
U9
(3) Supplying power Be sure to supply +5 V 5% (VCC) to the CN11 pin of the SE-17072 from an external power source. If the supply voltage of the target system used is not +3 V, the supply voltage of the target system can be supplied to the actual chips on the SE board from the CN12 pin or emulation probe. For details, refer to 4.1 Using Level Conversion Chips (PD6706GF) and 4.2 Supplying Voltage to SE Board. When VCC is correctly supplied, LED1 on the SE-17072 lights. If LED1 does not light, the possible causes are as follows: * Power is not supplied. * Overcurrent flows (about 500 mA or higher).
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HOW TO USE
(4) Executing program Connect the SE-17072 and the target system as illustrated in Figure 4-24 (refer to CHAPTER 6 CONNECTING SE-17072 AND TARGET SYSTEM). When power to the target system is turned on, power is also supplied to the SE-17072, power-ON reset is effected, and the program written to the PROM is executed starting from address 0H. When the reset switch on the SE-17072 is pressed, the SE board is forcibly reset, and the program written to the PROM is executed starting from address 0H, in the same manner as when power-ON reset is effected. Figure 4-24. Example of Connection When SE-17072 Alone Is Used
VCC (+5 V) Target system EP-17K56GB or EP-17K64GB Reset switch PROM
SE-17072
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CHAPTER 4
HOW TO USE
4.6 Monitor Pins and LEDs
The SE-17072 is provided with monitor pins that check the pin status of the actual chips, and LEDs that indicate the operation status of the board. Table 4-5 lists the monitor pins and LEDs and their functions. Figure 4-25 shows the layout of the monitor pins and LEDs. Table 4-5. Monitor Pins and LEDs, and Their Function
Monitor Pin, LED Monitor pin CH12 CH13 CH16 CH19 CH20 CH21 CH60 GND LED LED1 To monitor P1A2/AD0 To monitor P1A3/AD1 To monitor REG0 To monitor REG1 To monitor REGLCD0 To monitor REGLCD1 To monitor source clock (150 kHz) GND Light: Power ON Dark: Power OFF Light: Low-speed modeNote (instruction execution time: 106.6 s) Dark: Normal mode (instruction execution time: 53.3 s) Function
LED2
Note
Not provided when the actual chips are the PD17071GB. Figure 4-25. Layout of Monitor Pins and LEDs
CH57 55 53 51 30 8 6 4 CH2 56 GND 54 52 50 29 7 5 3 CH1
SW1
CH11 13161915 9 213234363840 4345474928262422
U13 CH10 1214182017313335373941 U14 4244464858272523
WT 1
Actual chip (slave) PD17071GB or PD17072GB or PD17073GB
U15
SW3
JS3
PD67076GF
CH60 CH59
CN9 Actual chip (master) PD17071GB or PD17072GB or PD17073GB JP7 WT WT 3 4 JP8
LED1
U1
WT2
Mam' chip (gate array)
LED2
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CHAPTER 4
HOW TO USE
4.7 Fine-Tuning of Source Clock Oscillation Frequency (150 kHz)
The frequency of the source clock for the supervisor operationNote of the SE board is 150 kHz. The clock (75 kHz) supplied to the actual chips is obtained by dividing the source clock by two. To fine-tune the source clock frequency, use a trimmer capacitor (VC1) as shown in Figure 4-26. To monitor the oscillated waveform and measure oscillation, use monitor pin "CH60". Figure 4-26. Fine-Tuning of Source Clock
Screwdriver (+)
PD6706
Y1
VC1
CH59
CH60
LED1
Frequency counter oscilloscope
Note
An operation to be executed on the in-circuit emulator when CLICE is used.
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HOW TO USE
4.8 Setting of Jumper Switches and Slide Switches
The jumper switches and slide switches of the SE-17072 are factory-set as indicated by Table 4-6 for shipment. Confirm the setting of these switches before using them. Table 4-6. Setting of Jumper Switches and Slide Switches (1/2)
Switch Number Factory Setting of Jumper Switch, Slide Switch
+3 V
Set Conditions
Set Position
JS1
Refer to 4.1 Using Level Conversion Chip (PD6706GF) and 4.2 Supplying Voltage to SE Board.
JS1
VDD1
JS2
1 3 5 JS2 2 4 6
This switch sets the actual chips used. Do not change Do not change the factory-set conditions of this switch (072). the setting of this switch
JS3
6 4 2
JS3
5 3 1
If chattering may occur on the CE pin
CHAP side
If chattering does not occur on the CE pin
Opposite side to CHAT Do not change the setting of this switch.
CHAT
JP3 JP4 2 1 JP6
JP3, JP4 12 11
These switches are factory-set according to the delay of the actual chips
COAX JP6
2 4 6
If signal is input/output to/from P0D3/FMIFC/AMIFC through probe If signal is input/output to/from P0D2/AMIFC through probe If signal is input/output to/from P0D3/FMIFC/AMIFC through coaxial cable If signal is input/output to/from P0D2/AMIFC through coaxial cable If VCOH is input through probe If VCOL is input through probe If VCOH is input through coaxial cable
F Opposite side to A COAX F COAX side
F
A
A
JP7
COAX JP7
H Opposite L side to COAX H COAX side L IN side
H
L
If VCOL is input through coaxial cable If capacitor on SE board is connected to PLL voltage regulator output pin (REG0)
JP8
JP8
IN VDD2 EX
JP9
If capacitor on target system is connected to PLL voltage regulator output pin (REG0) If capacitor on SE board is connected to oscillation circuit voltage regulator output pin (REG1)
EX side
JP9
IN side
IN VDD5 EX
If capacitor on target system is connected to oscillation circuit voltage regulator output pin (REG1)
Ex side
Remark The shaded portions in the above figures indicate the factory-set conditions for shipment.
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HOW TO USE
Table 4-6. Setting of Jumper Switches and Slide Switches (2/2)
Switch Number Factory Setting of Jumper Switch, Slide Switch Set Conditions Set Position
JP10 JP11 JP12
JP10, JP12 IN VDD3 EX VDD4 JP11 IN CAP EX
If capacitor on SE board is connected to pins connecting capacitors for LCD power supply REGLCD0, REGLCD1, CAPLCD0, and CAPLCD1
IN side
If capacitor on target system is connected to pins connecting capacitors for LCD power supply REGLCD0, REGLCD1, CAPLCD0, and CAPLCD1
EX side
SW2
ROM
SW2 RAM
When SE board is mounted to in-circuit emulator for evaluation RAM side
When SE-17072 alone is used for evaluation
ROM side
SW3 ON
SW3 OFF
Pull up CE pin
ON side
Not pull up CE pin
OFF side
Remarks 1. The shaded portions in the above figures indicate the factory-set conditions for shipment. 2. VDD2 of JP8 corresponds to REG0 pins of the actual chips. VDD5 of JP9 corresponds to REG1 pins of the actual chips. VDD3 of JP10 corresponds to REGLCD0 pins of the actual chips. VDD4 of JP12 corresponds to REGLCD1 pins of the actual chips. CAP of JP11 corresponds to CAPLCD0 pins and CAPLCD1 pins of the actual chips.
33
[MEMO]
34
CHAPTER 5 CONNECTOR PIN LIST
(1) PD17071 Table 5-1. Connector Pins of J1
J1 Pin No. Pin Name Pin No. of IC J1 Pin No. 56-pin QFP 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 NC NC NC NC NC NC NC NC GND P1A0 GND P1A1 GND P1A2 GND P1A3 GND P0C0 GND P0C1 15 14 13 12 11 10 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 GND P0D2/AMIFC GND P0D3/FMIFC/AMIFC GND GND GND EO GND VCOL GND VCOH GND REG0 GND VDD GND NC GND NC 23 22 21 20 19 17 16 Pin Name Pin No. of IC J1 Pin No. 56-pin QFP 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 GND REG1 GND REGLCD0 GND CAPLCD0 GND CAPLCD1 GND REGLCD1 GND COM0 GND COM1 GND COM2 GND COM3 GND LCD0 35 34 33 32 31 30 29 28 27 26 Pin Name Pin No. of IC 56-pin QFP
35
CHAPTER 5 CONNECTOR PIN LIST
Table 5-2. Connector Pins of J2
J2 Pin No. Pin Name Pin No. of IC J2 Pin No. 56-pin QFP 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 GND P1B2 GND P1B3 GND P1B0 GND P1B1 GND P0A2 GND P0A3 GND P0A0 GND P0A1 GND P1C0 GND P0B3 56 1 3 2 5 4 7 6 9 8 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 GND P0B2 GND P0B1 GND P0B0 GND BEEP GND NC GND CE GND LCD14 GND LCD13 GND LCD12 GND LCD11 46 47 48 49 50 51 52 53 54 55 Pin Name Pin No. of IC J2 Pin No. 56-pin QFP 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 GND LCD8 GND LCD7 GND LCD6 GND LCD5 GND LCD10 GND LCD9 GND LCD4 GND LCD3 GND LCD2 GND LCD1 36 37 38 39 44 45 40 41 42 43 Pin Name Pin No. of IC 56-pin QFP
36
CHAPTER 5 CONNECTOR PIN LIST
(2) PD17072 and 17073 Table 5-3. Connector Pins of J1
J1 Pin No. Pin Name Pin No. of IC J1 Pin No. 56-pin 64-pin QFP TQFP 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 NC (GND)Note NC NC NC NC NC NC NC (GND)Note (GND)Note (GND)Note (GND)Note (GND)Note 21 22 23 24 25 26 27 28 29 10 11 30 31 11 13 32 33 12 14 34 35 13 15 36 37 14 16 38 39 15 17 40 GND P0D2/AMIFC GND P0D3/FMIFC/AMIFC GND GND GND EO GND VCOL GND VCOH GND REG0 GND VDD GND NC GND NC (GND)Note 23 26, 27 22 25 21 24 20 23 19 22 21 17 19 16 18 Pin Name Pin No. of IC J1 Pin No. 56-pin 64-pin QFP TQFP 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 GND REG1 GND REGLCD0 GND CAPLCD0 GND CAPLCD1 GND REGLCD1 GND COM0 GND COM1 GND COM2 GND COM3 GND LCD0 35 40 34 39 33 37 32 36 31 35 30 34 29 33 28 32 27 31 26 30 Pin Name Pin No. of IC 56-pin 64-pin QFP TQFP
GND P1A0 GND P1A1 GND P1A2/AD0 GND P1A3/AD1 GND P0C0 GND P0C1
Note
(GND) is the case when the actual chip is 64-pin plastic TQFP.
37
CHAPTER 5 CONNECTOR PIN LIST
Table 5-4. Connector Pins of J2
J2 Pin No. Pin Name Pin No. of IC J2 Pin No. 56-pin 64-pin QFP TQFP 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 GND P1B2 GND P1B3 GND P1B0 GND P1B1 GND P0A2 GND P0A3 GND P0A0 GND P0A1 GND P1C0/SO0 GND P0B3/SI/SO1 56 64 1 1 3 3 2 2 5 6 4 4 7 8 6 7 9 10 8 9 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 GND P0B2/SCK GND P0B1 GND P0B0 GND BEEP GND INT GND CE GND LCD14 GND LCD13 GND LCD12 GND LCD11 46 52 47 53 48 55 49 56 50 57 51 58 52 60 53 61 54 62 55 63 Pin Name Pin No. of IC J2 Pin No. 56-pin 64-pin QFP TQFP 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 GND LCD8 GND LCD7 GND LCD6 GND LCD5 GND LCD10 GND LCD9 GND LCD4 GND LCD3 GND LCD2 GND LCD1 36 41 37 42 38 43 39 44 44 50 45 51 40 46 41 47 42 48 43 49 Pin Name Pin No. of IC 56-pin 64-pin QFP TQFP
38
CHAPTER 6 CONNECTING SE-17072 AND TARGET SYSTEM
This chapter describes how to connect the SE-17072 to the target system, turn on/off power, and remove the emulation probe from the target system, when the SE-17072 alone is used. To connect the SE-17072 and target system, follow these steps: (1) To connect SE-17072 and emulation probe (a) Turn off power to the SE-17072. (b) Connect the emulation probe to the SE-17072. (2) To connect the emulation probe and target system (a) Turn off power to the target system. (b) Solder the conversion socket to the target system. (c) Insert the socket conversion adapter into the conversion socket and secure the adapter with a screw. Caution As a factory-set condition for shipment, the socket conversion adapter and conversion socket are connected and secured with a screw. Therefore, step (c) is not necessary. In this case, solder the conversion socket with the socket conversion adapter connected, to the target system. (d) Insert the tip of the emulation probe into the socket conversion adapter. (3) Turn on power
39
CHAPTER 6
CONNECTING SE-17072 AND TARGET SYSTEM
Figure 6-1. Connecting SE-17072 and Target System
Hollow set screw Emulation probe
Socket conversion adapter
Target system
SE-17072
Conversion socket
J1 J2
40
CHAPTER 6
CONNECTING SE-17072 AND TARGET SYSTEM
6.1 Connecting SE-17072 and Emulation Probe
Connect the SE-17072 and emulation probe in the following procedure: <1> Turn off power to the SE-17072. <2> Connect the emulation probe to the connectors (J1 and J2) on the SE-17072. Figure 6-2. Connecting SE-17072 and Emulation Probe
Emulation probe
SE-17072
J1
J2
41
CHAPTER 6
CONNECTING SE-17072 AND TARGET SYSTEM
6.2 Connecting Emulation Probe and Target System
Connect the emulation probe and target system in the following procedure: Caution As a factory-set condition for shipment, the socket conversion adapter and conversion socket are connected and secured with a screw. Therefore, steps <3> and <4> below are not necessary. In this case, solder the conversion socket with the socket conversion adapter connected, to the target system. <1> Turn off power to the target system. <2> Solder the conversion socket to the target system. <3> Insert the socket conversion adapter to the conversion socket soldered to the target system. At this time, be sure to match the positions of the notches of the conversion socket and socket conversion adapter. Figure 6-3. Connecting Socket Conversion Adapter and Conversion Socket
Socket conversion adapter
Notches
Conversion socket
Target system
<4> Secure the connected socket conversion adapter and conversion socket with a hollow set screw (securing screw with hexagon hole) supplied as an accessory.
42
CHAPTER 6
CONNECTING SE-17072 AND TARGET SYSTEM
Figure 6-4. Securing Socket Conversion Adapter and Conversion Socket with Screw
Hollow set screw
Socket conversion adapter
Conversion socket
Target system
<5> Insert the emulation probe to the conversion adapter. At this time, be sure to match the positions of the notches on the emulation probe and conversion adapter. Figure 6-5. Connecting Socket Conversion Adapter and Emulation Probe
Emulation probe
Notches
Socket conversion adapter
Conversion socket
Target system
43
CHAPTER 6
CONNECTING SE-17072 AND TARGET SYSTEM
6.3 Turning ON/OFF Power
After connecting the SE-17072 and target system, turn on power. Be sure to turn on/off power in the following sequence: Caution Be sure to observe the sequence of turning on/off power. Otherwise, the SE-17072 or target system may be damaged. (1) Power-up sequence <1> Turn on power to the SE-17072. <2> Turn on power to the target system. (2) Power-down sequence <1> Turn off power to the target system. <2> Turn off power to the SE-17072.
44
CHAPTER 6
CONNECTING SE-17072 AND TARGET SYSTEM
6.4 Removing Emulation Probe from Target System
Remove the emulation probe from the target system in the following sequence: <1> Turn off power to the target system. <2> Turn off power to the SE-17072. <3> Hold the emulation probe with your fingers and pull-up the emulation probe at right angles. Figure 6-6. Removing Emulation Probe
Emulation probe
Socket conversion adapter
Conversion socket
Target system
45
[MEMO]
46
CHAPTER 7 DIMENSIONS OF PROBE, CONVERSION SOCKET, AND SOCKET CONVERSION ADAPTER
7.1 Dimensions of Probe
(1) EP-17K56GB-1 (Package with bent leads)
Pin 1 14 1 56 15 28 43 29 42 NEC EP-17K56GB-1
38
54
479 50 19.3 12.5 (Unit: mm)
(2) EP-17K56GB-2 (Package with inverted leads)
Pin 1
38
54
479 50
19.3
(Unit: mm)
12.5
50
50
43 56 1 42 14 29 28 15 NEC EP-17K56GB-2
47
CHAPTER 7
DIMENSIONS OF PROBE, CONVERSION SOCKET, AND SOCKET CONVERSION ADAPTER
(3) EP-17K64GB (Package with bent leads)
Pin 1 16 1 64 17 32 49 33 48 NEC EP-17K64GB
38
54
479 50 19.3 12.5 (Unit: mm)
48
50
CHAPTER 7
DIMENSIONS OF PROBE, CONVERSION SOCKET, AND SOCKET CONVERSION ADAPTER
7.2 Dimensions of Conversion Socket and Socket Conversion Adapter
7.2.1 EV-9500GB-56 Remark The EV-9500GB-56 is a set of the conversion socket and socket conversion adapter (socket and adapter are secured with a screw). (1) Conversion socket
15.1 10.57 0.65x13=8.45 C1.0 0.65 8.95
1.35
5.65
7.65
4 projections with height of 1.8
8.85 11.25
13.65
12.5
4-
0.7 0.25
1.85
3.5
2.0 2.6
0.25
1.225
10.05
1.225
1.35
9.8
13.9
49
CHAPTER 7
DIMENSIONS OF PROBE, CONVERSION SOCKET, AND SOCKET CONVERSION ADAPTER
(2) Socket conversion adapter
17.1 0.65 x 13 = 8.45 C2.0 0.65 o0.3 2.7
5.9 2.4 0.8 o1.03 0.7 o3.55 o4.5
13.65
11.25
8.85
o0.9
o1.1
o0.7
10.57 3.9 1.0 11.5
0.2 4.2
50
o1.4
CHAPTER 7
DIMENSIONS OF PROBE, CONVERSION SOCKET, AND SOCKET CONVERSION ADAPTER
7.2.2 EV-9500GB-64 Remark The EV-9500GB-64 is a set of the conversion socket and socket conversion adapter (socket and adapter are secured with a screw). (1) Conversion socket
14.0 9.24 0.5x15=7.5 C1.0 0.5 10.1 8.0
4.3
5.0
12.84
10.44 8.04 5.64
9.77
6.75
4 projections with height of 1.8
40.25
0.7
1.505
8.99 12.0
1.505
1.85 3.5
2.0 2.6
0.25
1.38
9.24
1.38
12.9
51
CHAPTER 7
DIMENSIONS OF PROBE, CONVERSION SOCKET, AND SOCKET CONVERSION ADAPTER
(2) Socket conversion adapter
16.0 0.5x15=7.5 2.7
5.9 2.4 0.8
0.3
0.5
0.7
12.84
10.44
8.04
5.64
3.5
4.0 1.1 0.7
0.9
1.03
C2.0
9.77 6.0 13.6 1.0
0.2 4.2
52
1.4
CHAPTER 7
DIMENSIONS OF PROBE, CONVERSION SOCKET, AND SOCKET CONVERSION ADAPTER
7.3 Recommended Mounting Pattern of Conversion Socket on Printed Circuit Board
(1) EV-9500GB-56
0.35
0.65x13=8.45 0.65
13.0
8.8
2.1
0.65 0.65x13=8.45
2.1
8.8 13.0
0.35
53
CHAPTER 7
DIMENSIONS OF PROBE, CONVERSION SOCKET, AND SOCKET CONVERSION ADAPTER
(2) EV-9500GB-64
0.35
0.5x15=7.5 0.5
13.0
9.0
2.0
0.5 0.5x15=7.5
2.0
9.0 13.0
54
0.35
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